what is LVS

LVS verification is checking that the design is connected correctly. The schematic
is the reference circuit and the layout is checked against it. In principle, the following
is verified:
• Electrical connectivity of all signals, including input, output, and power
signals to their corresponding devices
• Device sizes: transistor width and length, resistor sizes, capacitor sizes
• Identification of extra components and signals that have not been included
in the schematic; floating nodes would be an example of this