Single Chip Wireless Transceiver Architecture and Transmitter Design

A single-chip transceiver for frequency-hopped code division multiple access (CDMA) in the 900 MHz industrial, scientific and medical (ISM) band is implemented in 1-m CMOS. It combines a digital frequency synthesizer, a double quadrature upconverter, an integrated oscillator, and a power amplifier with variable output. Data modulates a carrier hopping at 20 kHz with quaternary frequency-shift keying (4-FSK). At an output power level of +3 dBm, the harmonics and spurious tones lie at 52 dBc or below. When active, the transmitter drains 100 mA from 3 V.
THERE is much interest today in the single-chip wireless transceiver which consumes a small amount of power, needs no off-chip components, supports voice and data traffic over short ranges by transmitting a modest power, implements power control, and is resilient to interferers. For many semiconductor companies this transceiver is particularly important if it is fabricated in the CMOS technology they use for their other IC products. This companion set of two papers reports on the design and performance of the first such integrated CMOS transceiver, developed for spreadspectrum code division multiple access (CDMA) operation in the 902–928 MHz industrial, scientific, and medical (ISM) frequency band. Over the years, radio communication across any significant distance was strictly regulated by issue of a license to transmit on precisely defined frequencies, with upper limits prescribed on the bandwidth of the transmitted signal and on its power level. With the advent of cellular and cordless telephones, the need for broad interoperability specifies, in addition, a modulation format and channel-access protocols. The Federal Communications Commission (FCC) has also opened up three frequency bands for unlicensed use in ISM applications. Instead of assigning fixed frequencies to certain users by license, multiple users gain access to these bands by spreading the transmitted spectrum according to uncorrelated pseuodonoise (PN) codes [1]. The FCC rules (Part 15.249) permit spreading either by direct-sequence modulation or by frequency hopping of the carrier, as long as the user spreads the signal by at least a certain amount. For instance, in the case of frequency hopping, the user must cover 50 distinct frequency slots before the hopping sequence repeats. The maximum transmitted power is limited to 1 W, and the out-of-ISM band emission must be 50 dB lower than the in-band transmitted power. There is free choice of modulation scheme. The ISM band gives great flexibility in the design of wireless equipment. From the researcher’s perspective, it is now possible to explore the multidimensional design space comprising modulation scheme, spreading method, transceiver architecture, and circuit building blocks, with the goal of finding the most compact transceiver, or one that consumes the least power at a given performance. This approach underlies the transceiver development described here. The goal is to develop a wireless device operating in microcells at a data rate of up to 160 kb/s, implemented entirely in the MOSIS 1- m CMOS technology available at the inception of this project. The next section summarizes the transceiver operation and some of the important architectural choices. Following that, the transistor-level circuit design of the key building blocks in the transmitter portion is described, and then the section on experimental results presents and discusses the collective performance of the entire transmitter portion of the transceiver. The companion paper covers the receiver architecture and broader issues of single-chip integration.

Free download research paper