NAND gate S-R latch

Caution! The 4011 IC is CMOS, and therefore sensitive to static electricity!




Although this circuit uses NAND gates instead of NOR gates, its behavior is identical to that of the NOR gate S-R latch (a “high” Set input drives Q “high” and a “high” Reset input drives Q-not “high”), except for the presence of a third input: the Enable. The purpose of the Enable input is to enable or disable the Set and Reset inputs from having effect over the circuit’s output status. When the Enable input is “high,” the circuit acts just like the NOR gate S-R latch. When the Enable input is “low,” the Set and Reset inputs are disabled and have no effect whatsoever on the outputs, leaving the circuit in its latched state.
This kind of latch circuit (also called a gated S-R latch), may be constructed from two NOR gates and two AND gates, but the NAND gate design is easier to build since it makes use of all four gates in a single integrated circuit.