fpga tutorial

FPGA is an integrated circuit that contains many (64 to over 10,000)identical logic cells that can be viewed as standard components.Each logic cell can independently take on any one of alimited set of personalities.The individual cells are interconnected by a matrix of wires and programmableswitches. A user’s design is implemented by specifying the simple logic function foreach cell and selectively closing the switches in the interconnect matrix.Complex designs are created bycombining these basic blocks to create the desired circuit.Field Programmable means that the FPGA’s function is defined by a user’s program rather than by the manufacturer of the device.Depending on the particular device, the program is either ‘burned’ inpermanently or semi-permanently as part of a board assembly process, or is loaded from an external memory each time the device is powered up. The FPGA has three major configurable elements: configurable logic blocks (CLBs), input/output blocks, and interconnects. The CLBs provide the functional elements for constructing user’s logic. The IOBs provide the interface between the package pins and internal signal lines. The programmable interconnect resources provide routing paths to connect the inputs and outputs of the CLBs and IOBs onto the appropriate networks. The Field-Programmable Gate Arrays (FPGAs) provide the benefits of custom CMOS VLSI, while avoiding the intial cost, time delay, and inherent risk of a conventional masked gate array. The FPGAs are customized by loading configuration data into the internal memory cells. Complex Programmable Logic Devices (CPLDs) and Field Programmable Gate Arrays (FPGAs) are becoming a critical part of every system design. There are many different FPGAs with different architectures / processes. There are four main categories of FPGAs currently commerically available: symmetrical array, row-based, hierarchical PLD, and sea-of-gates. In all of these FPGAs the interconnections and how they are programmed vary. Currently there are four technologies in use. They are: static RAM cells, anti-fuse, EPROM transistors, and EEPROM transistors. Depending upon the application, one FPGA technology may have features desirable for that application.

General information

Creating quasistatic, parameterized FPGA designs – New configuration approaches can lead to easier system designs, benefiting a range of applications. Reducing the overall pin count, interface complexity, and resource usage also enables FPGAs to be a flexible digital-signal-processing alternative to DSP architectures.
EDA tools bridge the system-on-programmable-chip design gap – Once relegated to low-cost, low-capability products, EDA tools for PLD development are becoming more complex to keep up with the increased capacity of the devices.
EDN Programmable-logic directory – The second annual EDN PLD directory highlights the architectures available for your next design. Find out what’s new, what’s obsolete, and what’s evolved in PALs, PLDs, and FPGAs.
Field-programmable devices – field-programmable devices come in a variety of fruity flavors, and more are arriving all the time
FPGA Basics
MRCI FPGA – MRCI maintains one of the most extensive databases on informaion pertaining to FPGAs or Field Programmable Gate Arrays.
FPGAs: a matter of cores – portable logic blocks, or cores, have become an accepted part of ASIC design but using cores in FPGAs presents a new set of challenges
FPGAs and ASICs – This web site is dedicated to the design and use of programmable and quick-turn technologies for space flight applications
FPGAs – Does the performance-power-price product of your software-centric approach no longer compute? Do you need a nimbler platform than a hard-wired ASIC can provide? Programmable logic may be your answer, but carefully calculate the trade-offs to correctly solve your problem.
New FPGA Program Techniques Kick ‘But’ – Theoretically, FPGAs combine the speed of dedicated, application-optimized hardware with the ability to flexibly change chip resource allocation, so the same system can run many applications, optimized for each one. But FPGAs have historically been so hard to program that it’s been very hard and expensive to use these advantages. New tools will help this.
PLD-design methods migrate existing designs to high-capacity devices – moving to newer higher capacity programmable devices can give you higher density and better performance
Programmable logic: Beat the heat on power consumption – Higher performanceand gate countsincrease programmable-logic powerconsumption. Wise device selection and design techniques can significantly improve your chances of coming in under the powerbudget.
Programmable Logic Devices / Programowalne uk.ady logiczne – The site is about programmable logic devices.The site has many links to sites in English and Polish about PLD.
Reconfigurable logic: built-in adaptability – A design based on reconfigurable logic offers both hardware speed and software flexibility. What’s it like to design with reconfigurable logic? In this EDN hands-on design project, we find out.
Reconfigurable logic: hardware speed with software flexibility – reconfigurable logic lets you dynamically alter hardware in real time, blurring the boundary between hardware and software
Tutorials for Xilinx and Altera programmable logic with schematic entry and Verilog
EDA tools for FPGAs break down the complexity gridlock – FPGA devices offer execution speed and gate capacity that rivals many ASIC implementations and fosters the growth of EDA tools in that market.

Resource pages

GHDL – GHDL is a VHDL simulator, using the GCC technology. GHDL implements the VHDL language according to the research 1076-1987 or the research 1076-1993 standard. GHDL compiles VHDL files and creates a binary which simulates (or executes) your design. GHDL does not do synthesis: it cannot translate your design into a netlist.
EDN’s Third Annual Programmable-Logic Directory – EDN’s PAL, PLD, and FPGA directory highlights the architectures available for your next design. Find out what’s new, what’s obsolete, and what’s evolved in PALs, PLDs, and FPGAs.
fpga4fun – HDL tutorials and designs to promote the use of FPGAs
Emacs Modes for Hardware Languages – This page provides links to existing Emacs modes for languages used in hardware design. – This is a good site containing free (GPL) tested Verilog/VHDL models.
SOCworks – Site to explore and simulate your System-On-Chip (SOC) ideas and architectures using real vendor IP.
Programmable-logic directory – EDN’s fourth annual programmable-logic directory highlights the architectures available for your next design. Find out what’s new, what’s obsolete, and what’s evolved in PALs, PLDs, FPGAs, and ASIC/FPGA hybrids.
SAVANT: VHDL Analysis Tools – The SAVANT project is an effort by University of Cincinnati’s Experimental Computing Laboratory to build freely redistributable VHDL analysis tools. All elements of the system that have been developed at UC have been release under one of the GNU public licenses (primarily LGPL).