EM simulation for RFIC

Traditionally,electromagnetic (EM)solvers were more commonly used in monolithic microwave
integrated circuit (MMIC),board,and package designs.However,as the process node shrinks
from 180nm to 90nm to 65nm to even smaller values and the design frequency continues to rise
to several GHz,the need for EM solvers in modern RFIC design flows is becoming acute.
The most common application for EM solvers in IC and package design is solving interconnect-type
problems,which include transmission lines,inductors,metal-insulator-metal (MIM)capacitors,and
package traces.Each of these problems requires the modeling of metal interconnects with skin
effect and proximity effects.These interconnects were usually modeled as metal sheets,using one
sheet for the so-called “thin ” metal model and adding additional sheets to capture the thickness
of the metal.
At the same time,the process itself is getting complicated with conformal or non-planar dielectrics,
deep trenches,sinkers,and wells.Newer design rules are mandating slotting in the metal and
dummy metal fills.Furthermore,RFIC designers are now tackling lossy substrates such as CMOS,
which require additional techniques like multiple layers,shields,and guard rings to maintain quality
factors for inductors.
The design frequency is also increasing.A typical operating frequency now resides at 3 to 5 GHz,
which means that the third harmonics are very close to 20 GHz.As a result,quasi-static field
solvers,electric or magnetic,are no longer accurate enough at the frequencies of interest.
So EM simulation is one of the important steps in rfic now a days,
any comments
Re: EM simulation for RFIC
Hi, guru
Here comes the questions:
If there’s a lone path for a GHz signal to transmit, EM simulation should do for this path as a transmission line. Then we may get a s-parameter for this line. I’m confused that if we have to match the driver and load to the transmission line?
Re: EM simulation for RFIC
Yes you are right, you have to match with input and output components,
Re: EM simulation for RFIC
HI, guru
To the same quesitions, for IC, the next stage usually is gate of mosfet. For the long transmission path, its load is a capacitor, isn’t it?
The reason we need to match the impedance is that for wave passing through different medium, there will be some power be reflected. If the impedance is not matched well, the signal arrived at the next stage gate will be much weak. Is this right?
However, though the power maybe weak, the voltage and current are possibly still strong, as long as they are orthogonality in phase.