cadence assura tutorial

Writing Assura Layer Definition and Derivation Rules

Original Layers versus Derived Layers
Deriving Layers

Layout Shapes
Polygon and Edge Data Formats
Conics and Paths
Converting Polygons to Edges
Logical Operations and Edge Layers

Invalid Graphics Data
Outputting Layers
Generating Layers for Area Fill

Background on Area Fill
generateFill Versus generateRectangle and generateCustomFill
Comparison of generateFill and generateRectangle/generateCustomFill
Controlling Fill Cell Naming


Writing Assura Design Rule Check (DRC) Rules

Assura DRC Overview

Assura DRC Methodologies
Limiting Design Rule Checking to Specific Areas
Assura Area-Based DRC
DRC Rule Writing Tips


Writing Assura LVS Device Extraction Rules

Overview of the Device Extraction Rule File

Tips for Writing Device Extraction Rules
Checking Results

Deriving Device Recognition Layers

Creating Unique Device Recognition Regions
Deciding Which Recognition Region to Use
Deriving Device Terminal Layers
Deriving Contact Layers

Establishing Connectivity

Defining Physical Connections
Connecting Shapes on the Same Layer Using Text
Inherited Connections

Extracting Devices

Defining Devices in the Hierarchy
Extracting Standard Device Types
Extracting Generic Devices

Extracting Cells as Black Box Cells

Defining Black Box Cell Pins
Defining Devices as Black Box Devices
Defining Interconnect Layers within Black Box Cells

Extracting Device Parameters

Creating Device Parameters with SKILL Functions
Extracting Device Parameters from CDF for DFII Layouts


Netlisting from the Schematic

Netlisting DFII Schematics

Netlisting Standard and Generic Devices
Creating a dfIIToVldb Rule File
Invoking the dfIIToVldb Netlister
Obtaining Custom Device Properties
Netlisting Multiplied Instances

Preparing Verilog Netlists for Assura LVS
Reading Mixed Format Netlists

CDL Instances in DFII Schematics
Verilog Instances in DFII Schematics
DFII Instances in Verilog Modules
CDL Instances in Verilog Modules

Translating CDL or SPICE Netlists to Assura Format


Assura LVS Comparison Rules

Compare Rules Overview
Representing Cell and Device Names

Identifying Cells
Identifying Devices
Distinguishing Devices and Cells

Processing Standard Devices

Converting Generic Devices to Standard Devices

Processing Generic or Custom Devices

Accessing Cell, Instance and Model Names
Generic Devices in SPICE Netlists

Specifying Cell Correspondence by Name

A Closer Look at Name Binding
How to Specify a Binding File
Binding File Syntax
Cell Names in the Binding File
Using Wildcards in Bindings
Specifying Device Bindings
Multiple Bindings
Automatic Binding of Assura Variant Cells


Assura RCX and Capgen Setup

Capacitance and Resistance Extraction Settings Table
Step 1. Establish an RCX Technology Directory
Step 2. Create a Process Description File

Special Process File Parameters and Features

Step 3. Convert LVS Extraction Rules
Step 4. Create a p2lvsfile Mapping File

How RCX Treats Unmapped Metal and Contact Layers.
Substrate Mapping in the p2lvsfile
Creating the p2lvsfile:
Stamping in RCX

Step 5. Run Capgen Simulation

Capgen Overview
Capgen in the Assura RCX Flow
CAPGEN Command Steps and Options

Step 6. Capgen Compilation and Script Initialization
How Assura RCX Uses the Capgen Setup Files
Step 7. Run Subgen for Substrate Profile (Optional)
Assura RCX Setup Steps Output Files


Setting Up Technology Data

Overview of the Technology Directory and Rule Sets

Technology Directory
Rule Sets
Mapping a Technology Name to a Technology Directory

Running Assura Tools with the Technology Directory

Running Assura in Batch Mode
Running Assura from the GUI
Using technology Data in RCX

Setting Up and Using Technologies

Creating a New Technology
Building Rule Sets
Typical Usage

Using the Assura GUI to Create Rule Sets


Defining GUI Templates for Users

Presetting DRC and LVS Run-time Options

AvParameters Setup Form
How to Set avParameter Options
AvParameters and Options

Predefining LVS Compare Rules

avCompareRules List
How to Set avCompareRule Options
General avCompareRules and Options
Network-Specific avCompareRules and Options

Presetting the RCX Extraction Options

Common Features
RCX Setup Form Layout

Setup Tab
Extraction Tab
Filtering Options Tab
Netlisting Options Tab
Run Details Tab


Invoking SKILL in Assura Runs

Using Skill to preset Assura DRC and LVS

Setting Fields Before Displaying Forms
Writing Information to the RSF File
Capturing Run Information
Form Field Descriptions
LVS Run Form
Altering Form Field Values and Editability
Sample Program
SKILL User Defined Program

Using Skill to preset Assura RCX

Setting Fields Before Displaying Forms
Assura 3.1 RCX Run Form
Sample Program